MX30LF2G18AC, MX30LF4G18AC 3V, 2G/4G-bit NAND Flash Memory
General Descriptions
The MX30LFxG18AC are 2Gb/4Gb SLC NAND Flash memory device. Its standard NAND Flash features and reliable quality of typical P/E cycles 100K (with host ECC), which makes it most suitable for embedded system code and data storage. The product family requires 4-bit ECC per (512+16)B. The MX30LFxG18AC is typically accessed in pages of 2,112 bytes for read and program operations. The MX30LFxG18AC array is organized as thousands of blocks, which is composed by 64 pages of (2,048+64) byte in two NAND strings structure with 32 serial connected cells in each string. Each page has an additional 64 bytes for ECC and other purposes. The device has an on-chip buffer of 2,112 bytes for data load and access. The Cache Read Operation of the MX30LFxG18AC enables first-byte read-access latency of 25us and sequential read of 20ns and the latency time of next sequential page will be shorten from tR to tRCBSY. The MX30LFxG18AC power consumption is 30mA during all modes of operations (Read/Program/Erase), and 50uA in standby mode.
Features
• 2G/4G-bit SLC NAND Flash
- Bus: x8
- Page size: (2048+64) byte, - Block size: (128K+4K) byte, - Plane size: 1024-block/plane x 2 for 2Gb
2048-block/plane x 2 for 4Gb
• ONFI 1.0 compliant
• Multiplexed Command/Address/Data
• User Redundancy
- 64-byte attached to each page
• Fast Read Access
- Latency of array to register: 25us
- Sequential read: 20ns
• Cache Read Support
• Page Program Operation
- Page program time: 300us( typ.)
• Cache Program Support
• Block Erase Operation
- Block erase time: 1ms (typ.)
• Single Voltage Operation:
- VCC: 2.7 ~ 3.6V
• Low Power Dissipation
- Max. 30mA Active current (Read/Program/Erase)
• Sleep Mode
- 50uA (Max) standby current
• Hardware Data Protection: WP# pin
• Block Protection
- PT (Protection) pin: active high at power-on, which protects the entire chip. The pin has an internal weak pull down.
- Temporary protection/un-protection function (enabling by PT pin)
- Solid protection (enabling by PT pin)
• Device Status Indicators
- Ready/Busy (R/B#) pin
- Status Register
• Chip Enable Don't Care
- Simplify System Interface
• Unique ID Read support (ONFI)
• Secure OTP support
• High Reliability
- Endurance: typical 100K cycles (with 4-bit ECC per (512+16) Byte)
- Data Retention: 10 years
• Wide Temperature Operating Range
-40°C to +85°C
• Package:
1) 48-TSOP(I) (12mm x 20mm)
2) 63-ball 9mmx11mm VFBGA
All packaged devices are RoHS Compliant and Halogen-free.
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